? semiconductor components industries, llc, 2010 january, 2010 ? rev. 0 1 publication order number: mc74hct366a/d mc74hct366a hex 3-state inverting buffer with common enables and lsttl compatible inputs high ? performance silicon ? gate cmos the mc74hct366a is identical in pinout to the ls366. the device inputs are compatible with standard cmos or lsttl outputs. this device is a high ? speed hex buffer with 3 ? state outputs and two common active ? low output enables. when either of the enables is high, the buffer outputs are placed into high ? impedance states. the hct366a has inverting outputs. features ? output drive capability: 15 lsttl loads ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 2.0 to 6.0 v ? low input current: 1.0 a ? high noise immunity characteristic of cmos devices ? in compliance with the requirements defined by jedec standard no. 7a ? chip complexity: 90 fets or 22.5 equivalent gates ? these are pb ? free devices* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. http://onsemi.com marking diagrams soic ? 16 d suffix case 751b tssop ? 16 dt suffix case 948f 1 16 1 16 1 16 hct366ag awlyww hct 366a alyw 1 16 a = assembly location wl, l = wafer lot y = year ww, w = work week g or = pb ? free package (note: microdot may be in either location) see detailed ordering and shipping information in the package dimensions section on p age 2 of this data sheet. ordering information
mc74hct366a http://onsemi.com 2 figure 1. pin assignment figure 2. logic diagram 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 a4 y5 a5 output enable 2 v cc y3 a3 y4 a1 y0 a0 output enable 1 gnd y2 a2 y1 a3 a4 a5 a0 a1 a2 2 4 6 10 12 14 output enable 1 1 15 pin 16 = v cc pin 8 = gnd output enable 2 y3 y4 y5 y0 y1 y2 3 5 7 9 11 13 function table x = don?t care z = high impedance inputs output enable 1 enable 2ay l l h x l l x h l h x x h l z z ordering information device package shipping ? mc74hct366adg soic ? 16 (pb ? free) 48 units / rail mc74hct366adr2g soic ? 16 (pb ? free) 2500 units / reel MC74HCT366ADTR2G tssop ? 16* 2500 units / reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb ? free.
mc74hct366a http://onsemi.com 3 maximum ratings* symbol parameter value unit v cc dc supply voltage (referenced to gnd) ? 0.5 to + 7.0 v v in dc input voltage (referenced to gnd) ? 0.5 to v cc + 0.5 v v out dc output voltage (referenced to gnd) ? 0.5 to v cc + 0.5 v i in dc input current, per pin 20 ma i out dc output current, per pin 25 ma i cc dc supply current, v cc and gnd pins 50 ma p d power dissipation in still air, soic package? tssop package? 500 450 mw t stg storage temperature ? 65 to + 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. ?derating ? soic package: ? 7 mw/ c from 65 to 125 c tssop package: ? 6.1 mw/ c from 65 to 125 c recommended operating conditions symbol parameter min max unit v cc dc supply voltage (referenced to gnd) 2.0 6.0 v v in , v out dc input voltage, output voltage (referenced to gnd) 0 v cc v t a operating temperature, all package types ? 55 + 125 c t r , t f input rise and fall time v cc = 2.0 v (figure 1) v cc = 3.0 v v cc = 4.5 v v cc = 6.0 v 0 0 0 0 1000 600 500 400 ns dc electrical characteristics (voltages referenced to gnd) symbol parameter test conditions v cc v guaranteed limit unit ? 55 to 25 c 85 c 125 c v ih minimum high ? level input voltage v out = v cc ? 0.1 v |i out | 20 a 4.5 to 5.5 2.0 2.0 2.0 v v il maximum low ? level input voltage v out = 0.1 v |i out | 20 a 4.5 to 5.5 0.80 0.80 0.80 v v oh minimum high ? level output voltage v in = v ih |i out | 20 a 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 v v in = v ih |i out | 3.6 ma |i out | 6.0 ma |i out | 7.8 ma 3.0 4.5 6.0 2.48 3.98 5.48 2.34 3.84 5.34 2.20 3.70 5.20 v ol maximum low ? level output voltage v in = v il |i out | 20 a 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v v in = v il |i out | 3.6 ma |i out | 6.0 ma |i out | 7.8 ma 3.0 4.5 6.0 0.26 0.26 0.26 0.33 0.33 0.33 0.40 0.40 0.40 i in maximum input leakage current v in = v cc or gnd 6.0 0.1 1.0 1.0 a this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high ? impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74hct366a http://onsemi.com 4 dc electrical characteristics (voltages referenced to gnd) symbol unit guaranteed limit v cc v test conditions parameter symbol unit 125 c 85 c ? 55 to 25 c v cc v test conditions parameter i oz maximum three ? state leakage current output in high ? impedance state v in = v il or v ih v out = v cc or gnd 6.0 0.5 5.0 10 a i cc maximum quiescent supply current (per package) v in = v cc or gnd i out = 0 a 6.0 4 40 160 a ac electrical characteristics (c l = 50 pf, input t r = t f = 6 ns) symbol parameter v cc v guaranteed limit unit ? 55 to 25 c 85 c 125 c t plh , t phl maximum propagation delay, input a to output y (figures 1 and 3) 2.0 3.0 4.5 6.0 120 60 24 20 150 75 30 26 180 90 36 31 ns t plz , t phz maximum propagation delay, output enable to output y (figures 2 and 4) 2.0 3.0 4.5 6.0 220 110 44 37 275 140 55 47 330 170 66 56 ns t pzl , t pzh maximum propagation delay, output enable to output y (figures 2 and 4) 2.0 3.0 4.5 6.0 220 110 44 37 275 140 55 47 330 170 66 56 ns t tlh , t thl maximum output transition time, any output (figures 1 and 3) 2.0 3.0 4.5 6.0 60 22 12 10 75 28 15 13 90 34 18 15 ns c in maximum input capacitance ? 10 10 10 pf c out maximum three ? state output capacitance (output in high ? impedance state) ? 15 15 15 pf c pd power dissipation capacitance (per buffer)* typical @ 25 c, v cc = 5.0 v pf 60 * used to determine the no ? load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc .
mc74hct366a http://onsemi.com 5 switching waveforms (v i = 0 to 3 v, v m = 1.3 v) v cc gnd t f t r input a (v i ) output y 10% v m 90% 10% 50% 90% t tlh t plh t phl t thl output enable (v i ) output y output y v m 50% 50% 90% 10% t pzl t plz t pzh t phz v cc gnd high impedance v ol v oh high impedance figure 1. figure 2. test circuits *includes all probe and jig capacitance c l * test point device under test output *includes all probe and jig capacitance c l * test point device under test output connect to v cc when testing t plz and t pzl . connect to gnd when testing t phz and t pzh . 1 k figure 3. figure 4. input a output enable 1 output enable 2 v cc to other five buffers y logic detail one of 6 buffers
mc74hct366a http://onsemi.com 6 package dimensions tssop ? 16 dt suffix case 948f ? 01 issue b ??? ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . section n ? n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 16x ref k n n 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint
mc74hct366a http://onsemi.com 7 package dimensions soic ? 16 d suffix case 751b ? 05 issue k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p ? b ? ? a ? m 0.25 (0.010) b s ? t ? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 6.40 16x 0.58 16x 1.12 1.27 dimensions: millimeters 1 pitch soldering footprint 16 89 8x on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mc74hct366a/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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